XHEART Unveils X7 Ultra Automotive-Grade Chip, 700 TOPS Targeting Large-Model Compute

The more a company relies on software for its living, the more it values hardware —

Momenta, known for its smart driving models, has appeared in the first public debut of a chip company that was founded just over two years ago.

Its first chip, adapted on Day 0.

The sister companies have finally come together, and the strongest smart driving model company now has wings.

XHEART has now become Momenta's hard-currency partner.

With both models and chips, Momenta's smart driving model performance and even the company as a whole now face a new value reassessment.

The chip is called X7 Ultra. Looking only at the compute figure, by the end of 2026 it can no longer be considered "extreme" — 700 TOPS.

But the official emphasis is on two other parameters.

First, the similarity between the quantized model output and the FP32 baseline model exceeds 99.99%.

What it wants to convey is that the X7 Ultra does have higher inference efficiency, but it does not allow quantization error to expand without limit; instead, it requires the quantized model output to stay as close as possible to the FP32 model.

Because large models are simply too hungry for compute, memory and power, the main way to push down model weights and computational precision is to reduce storage and computation overhead. But if you compress too hard, the output may also deviate.

Whether this trade-off can be handled well directly determines how large a model can actually run within a limited power budget.

The second metric is an NPU compute utilization rate of 98.7%, meaning that the chip's AI compute units spend the vast majority of their time performing effective computational work when running test tasks, with very little idle time.

This usually also means that the chip architecture, data transmission and software scheduling work well together, and the compute units are not likely to spin idle waiting for data or instructions.

The official reference data is: compared with industry flagship products, memory bandwidth consumption is reduced by 80% and energy efficiency is improved by 100%.

Looking back at the 700 TOPS compute figure at this point, its difference becomes understandable:

This is the first time the industry has used "large-model compute" to describe chip performance.

In the past, when talking about TOPS, people mostly used dense compute or sparse compute. These concepts can explain a chip's theoretical computing capability, but it is hard for them alone to answer a question closer to actual experience: when the models truly used for smart driving are put on it, exactly how fast can it run, and how stably?

For example, test metrics such as APS in the lab measure the runtime of a single model, and they can all help engineers analyze chip performance.

But real smart driving large models involve complex network structures, different types of operators, frequent data reads and writes, and scheduling among multiple computational tasks; pursuing speed in just one link has limited meaning, because other links may slow down the overall speed by waiting for data, insufficient memory bandwidth, or inefficient scheduling.

As a result, a gap may appear between laboratory benchmarks and the actual performance and driving experience of production models.

The evaluation approach of "large-model compute" is to directly use real production smart driving models to test the chip, rather than relying only on laboratory benchmarks.

In this way, the evaluation target shifts from relatively independent computational tasks to the smart driving large models in actual deployment.

This evaluation also has several other explicit constraints: the model structure cannot be changed at will, computational precision must be guaranteed, and the final driving experience cannot be compromised. The chip needs to maximize model operating efficiency while all these conditions hold.

This is what "large-model compute" aims to measure: under real production models and strict deployment constraints, how much computing capability the chip can actually provide, so that performance figures more accurately describe the work the smart driving system actually needs to complete.

And that model, at this stage, is Momenta's R7 world model —

To be frank with you, this chip company indeed has extremely deep ties with Momenta.

XHEART — the two companies have no direct equity subordination relationship; Momenta founding team members Cao Xudong and Xia Yan indirectly hold shares in XHEART through controlling shareholders.

It belongs to the same "sister company" relationship with Momenta. Its first mass-production product, the X7, has actually already been mass-produced in new cars from SAIC Volkswagen, but this X7 Ultra launch is XHEART's first formal public appearance.

First, imagine the process of a smart driving model working inside a car.

Cameras and lidar feed data in, the model begins computing layer by layer, and finally forms the information needed for perception and driving decisions. The entire process must finish within a limited time.

The problem is that an awkward situation can easily arise inside the chip: the compute units are clearly powerful, yet they are waiting for data; some operators compute very fast, while other operations hold up the entire chain; and as sensor data grows, front-end processing forms long queues.

The first step of the X7 Ultra is to make the NPU into a super-core architecture and increase inter-core interconnect bandwidth.

This consideration is directly driven by how large models compute:

As model scale expands, a large number of computational tasks need to be organized and executed, and compute units also exchange data. Super cores can work with more efficient interconnects to reduce losses during collaboration and let computing resources work more coherently.

But faster matrix computation does not mean the whole model is fast, because neural networks also contain many "supporting-role" operators, such as LayerNorm, Softmax and Transpose, among others.

They may not contribute the largest amount of computation, but they may repeatedly appear on the model execution path. If one operator is handled slowly, subsequent computations have to wait to "take the baton."

X7 Ultra is equipped with a dedicated compute engine for such operations, equivalent to assigning the model's high-frequency tasks to their own workstations, reducing the time that general-purpose compute resources are occupied by these operations.

With the hardware work arranged, the software still has to know how to dispatch the work.

When a model runs on a chip, it needs to go through compilation and scheduling, but if every operation is executed independently, intermediate results are constantly written back to external memory and then read out again, and the compute units waste a great deal of time waiting for data.

X7 Ultra, or rather XHEART, has built a unified solution for all chips—an AI toolchain that, through computational graph fusion, parallel execution and task scheduling, connects computations that can be merged as much as possible, reducing the back-and-forth movement of intermediate data.

In this product, X7 Ultra's memory bandwidth consumption is reduced by 80% compared with common products, and energy efficiency is improved by 100%—these two figures correspond precisely to the design goals of reducing data movement and improving the utilization efficiency of compute resources.

However, an intelligent driving system is not only neural networks; before sensor data enters the model, there is a considerable amount of front-end work.

Take lidar, for example: as the number of lines increases, the same scene produces denser point clouds with richer detail, and the processing volume rises accordingly. Another example is the camera link, which has an easily overlooked problem: latency jitter.

X7 Ultra provides targeted solutions. For example, a dedicated lidar accelerator is added to the processing subsystem, capable of processing 20 million points per second and supporting the point cloud processing requirements of thousand-line-class lidar.

For the camera processing link, local multi-core processing and pipeline control are optimized, and processing stability is improved by 100% compared with traditional solutions.

Of course, there is also the "dispatcher" of the entire chip—the CPU.

X7 Ultra adopts an Arm v9 automotive-grade CPU, which is also the first deployment of the Arm v9 architecture in China.

Compared with the previous generation, core performance is improved by 20% and energy efficiency by 10%, and vector processing, multi-core collaboration and L3 cache access are optimized.

The final hurdle is safety. X7 Ultra's SoC reaches the ASIL-B standard, and the integrated MCU reaches ASIL-D, undertaking functional safety tasks at different levels and providing the hardware foundation for fault monitoring, control and exception handling.

Looking at these designs together, X7 Ultra does not focus only on stacking compute power onto the NPU; it arranges computation, data movement, sensor processing and system scheduling together:

Model computation waits less, data flows in and out more smoothly, and front-end processing does not hold things back—only then can the entire chip handle intelligent driving tasks more efficiently.

This is also why XHEART repeatedly emphasizes that, compared with laboratory test standards, "testing chips with mass-production intelligent driving large models" is more reasonable.

Back when autonomous driving was still in the "slash-and-burn" era—that is, the era of reliance on high-precision maps plus rules, when the industry treated "opening cities" as the golden metric—Momenta CEO Cao Xudong was constantly preaching in the industry: the data flywheel, walking on two legs...

And the understanding that made him "out of step" with the mainstream back then has now become a recognized technical consensus: end-to-end, mapless, data-driven, reinforcement learning, world models...

This also directly explains why Momenta could stand out in the autonomous driving arena where heroes abound, leading uniquely in the breadth of partner automakers, the number of vehicle models and the volume of solutions deployed.

From XHEART's first public appearance and the release of X7 Ultra, Cao Xudong updated his understanding publicly for the first time:

He called "large models defining chips" Momenta's third important judgment.

The core definition is that the capabilities of intelligent driving models will continue to grow, and the computing architecture also needs to evolve along with the models; therefore, the intelligent driving Moore's Law also needs to be re-evaluated.

This understanding took shape in 2022 and began to be practiced by XHEART in 2023, a timing that corresponds to the rapid and profound underlying restructuring experienced by the autonomous driving technology system.

At the hardware level, the scale effect of mass-produced L2 began to take effect, the cost of sensors and chips fell rapidly, and intelligent solutions with "super-sized" configurations gained the foundation for mass production deployment.

At the model level, the data-driven paradigm rapidly replaced traditional methods. Not only the Transformer architecture, but also the iterative optimization of the models themselves, changed from manual parameter tuning and rule constraints to large-scale data feedback with specific distribution characteristics, driving reinforcement learning.

And end-to-end intelligent driving models based on Transformer essentially learn environmental representations, temporal relationships and driving decisions through massive amounts of data. The content models need to process is becoming increasingly complex: they must understand the current road environment and also combine information from consecutive moments to judge the behavior of vehicles, pedestrians and other traffic participants, ultimately forming driving actions.

World models further emphasize the prediction of physical world states and their future changes, giving the system stronger environmental understanding and future deduction capabilities.

Cao Xudong believes that for the large-scale deployment of autonomous driving, the corresponding on-device models may need to reach at least the 10B, or even 100B, parameter level; only then is it possible for true L4 deployment to start at a scale of one million units.

Model parameter scale is only one dimension; operator types, data access methods and the parallel relationships of computational tasks also affect whether a model can run in real time on the vehicle.

This immediately raises the computational demands that the chip must handle to a much larger scale—while simultaneously satisfying constraints on power consumption, automotive-grade reliability and cost. Down to the details, which operators are worth dedicated acceleration, which data need to reduce redundant movement, which computational tasks are suited to parallel processing... all of these must be considered in coordination with the model architecture during the chip design phase.

If the data flywheel, the two-legged approach and the natively architected chip can be combined, model progress will no longer depend solely on single-point optimization by the algorithm team; the underlying hardware will also begin to evolve jointly around the model's actual needs.

Momenta's technology system then has the opportunity to connect data accumulation, model training and iteration, chip computing, and ultimately mass-production deployment.

From 2022 to 2026, the smart-driving experience improved roughly 10x every two years—this was the smart-driving "Moore's Law" widely recognized by the industry in the past.

But viewed within the framework of "large models defining chips," Momenta has already practiced a new positive-feedback loop: the model determines the computational requirements, and the computing architecture in turn affects the scale and cost at which the model can be deployed on the vehicle.

As mass-production scale expands, it in turn provides sustained conditions for the model to accumulate data and validate capabilities. With all links working in coordination, single-point technological breakthroughs have the opportunity to translate into iteration speed for the entire system.

A 10x improvement in 2 years may not be a fixed number. Large models defining chips are accelerating the smart-driving Moore's Law toward a 10x improvement every year.

The most likely first validation will be L4 autonomous driving deployment applications, including robotaxis, unmanned delivery vehicles, unmanned trucks and other forms.

With higher on-vehicle computing efficiency, partners for chip operator and IP-level optimization, and mature production and supply chains plus cost-control capabilities, Momenta has become the variable with the greatest weight of influence.

XHEART, the English name of Xinxin Hangtu, retains an X that can be extended further: today it is cars, and in the future it may also be robots and other intelligent-agent terminals. Momenta's technology system thus has the possibility of extending from autonomous driving to generalized physical AI.

After all, autonomous driving and robots share common requirements in perception, decision-making, real-time response and energy efficiency. The even stricter heat-dissipation constraints of robots also give greater potential value to the low-power design that XHEART has always emphasized.

Of course, different intelligent-agent terminals still need product solutions redesigned around specific tasks, but in chip architecture for Transformer large models, underlying toolchains and software-hardware co-design experience, Momenta and XHEART have already taken the lead.