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Semiconductor Industry ObserverUpdated Oct 30 14:13

Siemens Fuse EDA AI Agent: Using Physical Verification to Backstop Agentic EDA

AI summary

Siemens has launched an intelligent engineering workflow in which the Fuse EDA AI Agent serves as an MCP aggregation layer connecting to Claude Code, autonomously orchestrating 3D-IC electrothermal co-design, linking seven Siemens EDA tools across nine stages, requiring 100–200 iterations and a total duration exceeding 12 hours. Every decision in this workflow is verified by a deterministic, physics-based EDA solver engine; a single round can cover more than 200 to 500 design points, tool configuration efficiency is improved by up to 20x, manual workload is reduced by as much as 95%, and the number of evaluable design options reaches up to 50x that of traditional manual workflows.

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The agent continuously validates its own judgments during its work, rather than waiting until the entire round of tasks has finished to check. But what exactly should these judgments be verified against? The answer is the laws of physics. More precisely, it is deterministic, physics-based EDA engines that determine whether a design is correct. Self-verifying agents are responsible for checking their own work outputs, while a physically verified flow confirms that these outputs comply with physical rules.

Semiconductor design is constrained by the laws of physics

Chip design is always constrained at the physical level. Regardless of how a design is generated, every transistor, every trace, every timing path, and every temperature gradient must obey fixed physical laws. This is also why tapeout results are black and white: a silicon die either functions correctly or it fails.

This is what distinguishes models capable of reasoning about physical phenomena from design flows that have been physically verified.

What does "physical verification" mean

A physically verified flow means that every decision an agent makes must be verified by a deterministic, physics-based EDA engine before it proceeds to the next step. Verification is not placed only at the end of the flow, waiting until the entire round of simulation has finished; rather, it is carried out continuously at every step, relying on solver engines that engineers have trusted for decades.

The agent performs one step of operation, and then the engine determines whether the result satisfies the design's physical constraints. If not, the agent locates the problem, fixes it, and continues execution. So-called physical verification means that the authority for determining correctness is the solver engine, not the AI model.

Why it is crucial for the tapeout stage

In semiconductor design, unverified decisions have no margin for error. Tapeout deadlines are fixed, re-tapeout is costly, and missed market windows cannot be recovered.

Even if an agentic flow can correctly reason through physical logic, if its output results are not verified by a physics engine, every autonomous operation introduces risk. The longer a flow runs without verification, the more severely the design will have deviated from the correct state by the time errors are exposed.

In long-duration autonomous flows spanning multiple tools and multiple physical domains and lasting several hours, unverified errors will continuously accumulate when there is no human intervention. Continuous physical verification can prevent such errors from propagating layer by layer through the flow.

3D-IC design: a multiphysics challenge

An autonomous device library characterization flow was introduced earlier: the agent continuously self-checks by relying on a physics EDA engine. That case demonstrated this principle at the level of a single task. When a flow spans multiple tools and multiple physical domains, the necessity of continuous verification increases further, and 3D-IC design is a typical example. It is the ultimate test of physical rules and best illustrates that chip design is fundamentally subject to the laws of physics.

AI compute clusters have continuously rising demands for compute power, memory bandwidth, and heat dissipation performance, yet the available physical space is increasingly constrained. Scaling of monolithic dies in power, performance, and area is approaching physical limits, and chiplet-based 2.5D and 3D architectures rely on high-density packaging to achieve scaling of compute and storage.

This high level of integration greatly increases the complexity of physical design. Stacking active dies makes heat dissipation and inter-chip thermal coupling harder to predict, and the packaging structure also introduces mechanical stress. Electrical, power, thermal, and mechanical effects are coupled with one another, so a change in one place affects other metrics. Handling such problems with traditional manual, fragmented, multi-tool siloed flows results in a large number of cross-role handoffs, slow iteration, and a very limited number of design options that teams can evaluate.

An autonomous flow for 3D-IC design

Siemens has introduced an intelligent engineering flow that can autonomously schedule 3D-IC design and analysis tasks. The MCP servers and script files corresponding to different EDA tools connect to the Fuse EDA AI Agent; as an MCP aggregation layer, this agent can interface with any code agent. In this case, Claude Code was selected as the code intelligence development environment to schedule an electro-thermal co-design flow comprising nine stages, chaining together seven Siemens EDA tools, requiring the agent to perform 100–200 iterations over a total duration exceeding 12 hours.

Each stage undertakes an independent engineering task, including floorplanning, device library characterization, power analysis, thermal signoff, system-level thermal simulation, parasitic extraction, and SPICE simulation that accounts for both power and temperature. All stages are verified using signoff-capable, physics-based solvers.

The entire flow runs autonomously, automatically performing analysis, evaluating results, identifying metrics that fall short, and continuously iterating to optimize the design. Within a single loop, teams can sweep heat transfer coefficient (HTC) boundaries, power budgets, and stack-up material options, covering more than 200 to 500 design points. This approach can improve tool configuration efficiency by up to 20x, reduce manual workload by up to 95%, and increase the number of design options that can be evaluated to as much as 50x that of traditional manual flows.

How to determine whether a flow has been physically verified?

When evaluating an intelligent EDA flow, a single question is enough to determine whether it satisfies the physical verification architecture: after each step is executed and before the flow continues, are the agent's output results verified by a deterministic, physics-based EDA engine?

If the answer is yes, then this flow is a physical verification flow. The solver engine serves as the basis for judgment, and all autonomous decisions must be confirmed against the physical reality of the design.

Intelligent EDA for volume production needs to meet three conditions: an architecture suited to real engineering environments, a self-verification mechanism that continuously validates agent decisions, and a physical verification standard that determines whether decisions are right or wrong.

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Semiconductor Industry Observer