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Phoenix TechnologyUpdated Oct 30 14:37

XHEART Releases Large-Model Chip X7 Ultra with 700 TOPS of Compute

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XHEART has released the X7 Ultra, a new-generation chip designed for billion-parameter-level smart-driving large models, with 700 TOPS of compute. The company says that in real-world tests using a partner's production Transformer smart-driving model, compute utilization reached 98.7%, and that while matching the model performance of industry flagship chips, memory bandwidth consumption dropped by 80% and inference energy efficiency improved by 100%. The X7 series has shipped a cumulative 200,000 units in 8 months of mass production, equipping 10 production vehicle models, with the first launch model being the SAIC Volkswagen ID.ERA 9X; at the same event, Momenta released the R7 Ultra world model, whose parameter count is 5 to 10 times higher than the previous generation.

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The original text provides comparison data on the X7 Ultra's compute, energy efficiency, and memory bandwidth, which can be used to assess how far the approach of defining chips around large models has progressed in the automotive sector.

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Just now, China's first AI-defined chip is born. Xinzhiyuan, October 30, 2026, 12:59:37, from Beijing. Updated October 30, 2026, 13:10:53.

Over the past two days, South Korea's SK Hynix has released an earnings report that could make peers weep.

In a single quarter, operating profit was about $62 billion, up 632% year over year, with an operating margin of 80%. That is equivalent to earning 80 cents of pure profit on every dollar of memory sold.

What really makes people gasp is the forecast it casually let slip—

The memory supply shortage will continue all the way to 2030; for 2027 and 2028, more than half of capacity has already been locked up in advance by long-term contracts.

The coming wave of "memory gold-devouring beasts" is autonomous driving and robots.

A week earlier, at Tesla's third-quarter earnings call, Musk also acknowledged this reality: the AI5 chip will not truly be installed in the Optimus robot until around April next year.

To completely break through the bottlenecks of memory, packaging, and logic chips, Tesla will also build its own Terafab chip plant.

By early 2028 alone, it will have to pour in tens of billions of dollars first; over the long run, total investment may even exceed $100 billion.

Today, model parameter scales are growing larger and larger, and chips and memory simply cannot keep up.

So the question is: without Tesla's deep pockets and without planning to build its own wafer fab, can this path still work?

Today, a Chinese chip company founded less than three years ago delivered its answer.

XHEART has released its new-generation large-model chip, the X7 Ultra, aimed directly at billion-parameter-level intelligent-driving large models, with 700 TOPS of computing power.

Under comparable model performance, the X7 Ultra benchmarks against industry flagship chips with memory bandwidth consumption reduced by 80%.

At the same time, its sister company Momenta shared on the same stage the latest progress of the R7 Ultra world model.

And XHEART's solution to breaking the deadlock can be summed up in one sentence: let large models define the chip.

The model has changed its brain

And the chip's exam questions have changed too

Intelligent driving in the past was pieced together from a bunch of small models: perception, prediction, and planning each handled one segment, passing down the line like an assembly line.

Each time information passed through another hand, it was flattened once, and the ceiling was low; how well small models could perform depended entirely on how thoroughly engineers thought things through. XHEART CEO Li Zonglin said bluntly on stage, "That was a system driven by the human brain: engineers wrote rules, and machines executed them."

But once Transformer emerged, end-to-end large models directly overturned that old table, and intelligent driving truly became a data-devouring monster.

The algorithm changed its core, and the chip running the algorithm immediately hit three new walls.

Can paper computing power actually be delivered in a real system?

How many TOPS of computing power a chip is rated for is like the top-speed number on a sports car's speedometer: it says it can hit 300 km/h, but in morning rush-hour traffic it still only does 20.

For large models, the traffic jam is data movement: parameters and intermediate results shuttle back and forth between memory and compute units, and the compute units calculate at high speed and then wait idly for data.

Even more fatal is precision. If key computations cut precision to speed things up, decisions on the vehicle will become "distorted." Users do not care about paper specs; they only care whether the car reacts quickly on the road and whether judgments are timely.

Can today's chip keep up with tomorrow's model?

It often takes several years for a chip to go from definition to being installed in a vehicle, while models release a major version every six months. If the design fails to anticipate where the model will grow and does not reserve enough resources, not long after the car is sold, OTA upgrades will hit a wall.

Can the required capability be obtained with reasonable energy consumption?

The most direct way to raise computing power is to stack transistors, but heat dissipation in a vehicle always has a hard boundary, and solutions with soaring power consumption are hard to put into mass production. This year memory prices have multiplied again, and every extra trip data makes in memory costs real money.

Practical needs require these three questions to be answered together.

When Tesla parted ways with Mobileye ten years ago and developed its own chip, what it saw through was exactly this layer. It is just that its chips have always been for its own use only.

XHEART's approach is the reverse—first figure out exactly how the model runs on the vehicle, then design the chip in reverse.

General-purpose chips are like off-the-rack clothes in a mall: anyone can wear them, but they fit no one particularly well. XHEART is tailoring to measure, taking measurements from large models, with the measuring tape in the hands of its sister company Momenta: real models and real data running on millions of mass-produced vehicles.

How the chip architecture is built, how resources are allocated, how it works, and where it iterates are all centered on the large model.

Applied to the X7 Ultra chip, XHEART made several very precise cuts:

First cut: go directly to a super-large-core NPU.

The traditional approach is for a bunch of small cores to work separately, with data transfer between cores at the level of hundreds of GB per second.

X7 Ultra gathers them into one super-large core, directly raising intra-core data interaction to the TB-per-second level, equivalent to replacing a country road with an eight-lane highway. Combined with large-capacity, high-concurrency multi-level cache, data circulates inside the chip as much as possible and runs less to external memory, so both compute waiting and energy consumption come down.

Second cut: dedicated operator acceleration engines.

Early NPUs were designed for convolutional networks. In the Transformer era, some computations can only be offloaded to the CPU, and switching back and forth also adds extra memory reads and writes. The industry's approach is to add vector processors inside the NPU.

This time, the X7 Ultra gives them dedicated hardware acceleration, with native support for FP16 high-precision computing—it wants both speed and accuracy.

Third cut: unlocking NPU hardware parallelism.

Compute units start work simultaneously, so computing and weight loading proceed in sync. It's like a production line: raw materials are delivered to the workstation in advance so the machines can keep running at full capacity.

In conventional inference, after each step of computation, the intermediate results are written back to external memory and then read back in the next step.

The X7 Ultra toolchain fuses the entire network into one "mega-operator," so intermediate results no longer go in and out of external memory; external memory only handles input, output, and weights, achieving zero-copy memory access across the whole network.

Compute power surges to 700 TOPS, targeting billion-parameter large models

So what do these changes deliver?

The X7 Ultra is designed for billion-parameter-level intelligent driving large models, with compute power surging to 700 TOPS. On its own, that number isn't intimidating.

What's fierce is its exam rules: it runs production intelligent driving large models, and the deployable precision of the chip's output must reach "four nines," that is, 99.99%.

Under this exam syllabus, the report card is very impressive:

In real-world tests using a partner's production Transformer intelligent driving model, compute utilization reached 98.7%. Nearly every drop of the nominal compute power was put to use.

Under conditions of comparable model performance, benchmarked against industry flagship chips, memory bandwidth consumption dropped by 80%.

Under the same conditions, compared with industry flagship products, inference energy efficiency improved by 100%.

98.7% answers the first question, and doubled energy efficiency answers the third. As for SK Hynix's "shortage until 2030," while others are still queuing up to pay the memory tax, XHEART has already given itself an 80% discount.

On configuration, it goes all out: the X7 Ultra uses an Armv9 automotive-grade CPU, and XHEART secured China's first production qualification for it.

LiDAR has already escalated to thousands of lines, and the X7 Ultra is specially equipped with an accelerator that processes 20 million points per second. On the camera side, the X7 Ultra adds a dedicated multi-core processor for local computing, and measured camera processing stability is 100% better than competitors.

In addition, the new chip's functional safety meets ASIL-B, the built-in MCU achieves the highest grade ASIL-D, and information security meets National Cryptography Level 2.

All of the above designs start from the same point: understand large models first, then design the chip.

The first-generation X7 has already proven that with the same chip resources, the number of model parameters that can be deployed is about 10 times that of general-purpose chips.

A three-year-old unicorn

Why automakers dare to sign

No matter how elegantly the technology is explained, automakers ultimately ask just one question: do you dare to hand over the car to you?

When automakers choose chips, they are actually betting on the future. It takes several years for a chip to go from design win to vehicle launch, and after the car hits the market it will sell for several more years, yet models iterate every six months.

Having forward-looking ideas alone is not enough. In the auto industry, trust can only be earned through real combat.

First, look at the person leading the troops. CEO Li Zonglin has more than 20 years of deep experience in the chip industry, rose to head of the wireless communications business unit at MediaTek, and later served as COO of OPPO's Zeku.

When he plunged back into the entrepreneurial wave in 2023, he and Cao Xudong reached two judgments: large models will change intelligent driving and also change the way chips are designed; automobiles are the starting point for large models to benefit ordinary people, and chips must do well on performance, energy efficiency, and cost together.

Half of the core team comes from leading chip companies, and half from frontline intelligent driving algorithm firms.

English text is being prepared.

Momenta put production models into the chip's pre-silicon verification in advance; before the chip was even manufactured, the model had already "trial-lived" in simulation. Manufacturing was handed to TSMC, and vehicle performance was honed together with automakers.

So after the X7 came back from the fab, the speed was absurdly fast: the entire chip lit up in less than 24 hours, the full vehicle loop was completed in 17 days, and in 21 days it underwent real-vehicle inspection by partners. Customers sitting in the car and driving a lap themselves is more convincing than reading a hundred pages of PPT.

Next, whether it is worry-free. XHEART does not act as a Tier 1, but its reference design is validated to OEM mass-production standards, so automakers can develop with it directly. Among them, the dual-X7 solution uses a unified "dual-brain" architecture, with one set of hardware compatible with L3 and L4, full redundancy at key links, and it has already won design wins on multiple models.

Finally, let the track record speak. The X7 series has been in mass production for 8 months, with cumulative shipments of 200,000 units, installed on 10 production models, and orders for more than 40 models.

The debut vehicle is SAIC Volkswagen's flagship SUV ID.ERA 9X, followed by Roewe Jiayue 07, MG 07, and some Cadillac and Chery models. From 300,000-yuan-class luxury flagships to 100,000-yuan-class mass-market family cars, it covers the entire line.

Worth mentioning is that capital is also voting with its feet. Just a few days ago, this unicorn finalized a new round of financing, totaling nearly 5 billion yuan.

On the investor list are European automaker Renault and domestic memory leader ChangXin Technology. A memory maker voluntarily taking a stake in a large-model chip company—this move is worth savoring.

World model R7 Ultra debuts

Future chips will only get stronger

At this conference, "sister company" Momenta brought the next-generation R7 Ultra world model.

The parameter count is 5 to 10 times higher than the previous generation, safety performance is improved by more than 5 to 10 times, and the ability to "deduce all things" is beginning to emerge.

The X7 Ultra supports the R7 Ultra, and together the two sides built a "world model base platform": Momenta tells the chip in advance where the model will grow, and XHEART adjusts the architecture accordingly; the actual conditions of vehicle-side compute in turn feed back into model R&D. Experience gained on real roads then pushes both sides forward together.

Momenta CEO Cao Xudong once proposed the "intelligent driving Moore's Law"—the safety and performance of intelligent driving improve tenfold every two years. And large-model chips are accelerating the "intelligent driving Moore's Law," further raising it to 10x per year.

This also led him to a new judgment: around 2028, L4 will reach the industry's tipping point, and 2030 is expected to enter large-scale deployment.

For this law to hold, models must keep growing, and chips must keep up.

On this side, XHEART advances at the rhythm of "mass-produce one generation, develop one generation, pre-research one generation." The next-generation X9 is already in development, targeting the higher requirements of L4 autonomous driving and embodied intelligence.

Tesla proved that integrated software and hardware is the hardest moat, but it keeps it behind closed doors for its own use and still has to build its own factories and foot the bills. Momenta and XHEART connect models, data, and chips, and then open this integrated software-hardware capability to automakers worldwide.

Musk prepared ten years for this and is still spending money.

On XHEART's side, in Li Zonglin's words, from being the first to propose "large models define chips" to being the "first" to mass-produce large-model chips at scale, it took less than three years.

The answers to the three questions have been handed in. Next, the ones doing the grading are ordinary people who drive these cars to work every day.

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Phoenix Technology