HBF opens up room for cost reduction in AI storage, but squeezes traditional NAND supply

HBF Opens Room for AI Storage Cost Reduction, but Squeezes Traditional NAND Supply Source: Semiconductor Horizons Published: 2026-11-04 17:22 Storage HBM Generate Poster The HBF with 8 bare dies stacked has a manufacturing cost of $0.64 per GB; while the 8-layer stacked HBM4 has a manufacturing cost of $6.78 per GB.

High Bandwidth Flash (HBF) is expected to provide more storage capacity for AI accelerators, with a manufacturing cost per GB of roughly one-tenth that of HBM4. But mass production of HBF will consume far more wafer capacity than traditional NAND, potentially compressing the supply space for SSD manufacturers. According to Bernstein's estimates, the HBF with 8 bare dies stacked has a manufacturing cost of $0.64 per GB; while the 8-layer stacked HBM4 has a manufacturing cost of $6.78 per GB. However, to produce the same storage capacity, the wafer area required for HBF is approximately 6.5 times that of the TLC NAND used in enterprise SSDs.

Bernstein also estimates that, assuming the selling price of a single HBF stacked product is on par with HBM, the gross margin of 8-die HBF could reach 86.5%. The above are all model-based estimates, not actual production costs or commercial gross margins.

HBF stacks multiple NAND bare dies and widens the data path to transmit massive amounts of data at high speed to AI accelerators. Although its latency is higher than HBM, it can provide greater capacity at lower cost, filling the gap between HBM and SSD. The idea is: latency-sensitive workloads run in HBM, while HBF is used to carry enormous volumes of model data that need to be read frequently.

Goldman Sachs analyst James Schneider believes that, relying on higher accelerator utilization, HBF is expected to reduce AI inference costs by about 30%. Assuming 15% to 50% of AI chips adopt this technology, by 2030, the potential market size of high-performance NAND, including HBF, could reach $40 billion to $150 billion.

SanDisk aims to deliver HBF samples in 2027

SanDisk and SK Hynix are working together to formulate HBF standards and promote the implementation of this technology. SanDisk completed tape-out of its first HBF storage bare die in August, and confirmed at its October 29 earnings call that manufacturing has started. The company plans to deliver the first batch of HBF-based samples in 2027. SanDisk CEO David Goeckeler said the company still needs to complete tape-out of the controller base die and component integration, after which it will send samples to customers for testing. Customer test results will determine the actual performance of HBF in AI systems and the pace of customer adoption. HBF has not yet been included in SanDisk's long-term financial model.

SK Hynix said in its October 28 earnings report that it plans to rely on HBF and system optimization to make NAND a core technology for improving AI business throughput and cost efficiency. At this stage, SK Hynix's NAND strategic focus remains enterprise SSDs. The company plans to increase the share of its 321-layer NAND process to more than half of its domestic South Korean capacity in the fourth quarter. In August this year, SK Hynix and SanDisk released the first HBF technical specification through the Open Compute Project (OCP), covering two stacking schemes with 8 bare dies and 16 bare dies, with a maximum capacity of 512GB and a bandwidth range of approximately 0.4TB/s to 3.0TB/s. Google and AI chip manufacturer Tenstorrent have also joined this standardization work.

Samsung Electronics is also developing high-performance NAND technology, launching the zNAND-O architecture for on-device AI.

HBF will divert traditional NAND capacity

Under Goldman Sachs' optimistic scenario assumption: by the end of 2028, half of AI chips will carry HBF. By then HBF will account for about 4% of global NAND bit shipments, but will consume about 9% of wafer capacity. This gap stems from HBF's high consumption of wafer resources. If manufacturers switch to producing HBF without adding total capacity, the wafer supply left for traditional NAND products such as enterprise SSDs will shrink.

And SanDisk's existing long-term supply commitments will make this capacity shift more difficult. SanDisk has signed long-term agreements with 8 customers, and the bit capacity covered by the agreements accounts for about half of its expected total shipments in fiscal year 2027 and two-thirds of its expected total shipments in fiscal year 2028. The company revealed at its October earnings call that its intended order backlog has exceeded available capacity through the end of 2029. These agreement orders are not currently identified as HBF orders, and supply commitments to existing customers will limit the scale of capacity SanDisk can shift to new products.

SanDisk's NAND production has long relied on partner Kioxia. According to SanDisk's annual report, all of its flash wafers currently come from Flash Ventures, a joint manufacturing entity established with Kioxia in Japan. The agreement between the two parties restricts the relocation of flash production and the use of third-party foundries. Kioxia has not joined the HBF standards alliance, but is developing another high-performance flash architecture, Blocks & Files reported on November 3.

In August 2025, Kioxia demonstrated a 5TB flash module for edge AI, with a bandwidth of 64GB/s. The solution uses a serial chain interconnect, which is different from the vertical stacking route of SanDisk and SK Hynix. SanDisk has not yet disclosed how it will resolve HBF wafer supply under the existing manufacturing cooperation framework. The two companies have also not issued any dispute announcements related to HBF production.

The commercial value of HBF ultimately depends on yield, selling price, and the scale of wafer capacity it consumes. The first batch of samples is expected to be delivered in 2027, and subsequent customer testing will verify whether the expected cost savings can cover the high wafer consumption.

This article is reproduced from media reports or online platforms and represents the author's personal position or views. Our reproduction is solely for sharing and does not mean we approve of or endorse it. If the source is incorrectly labeled or your legitimate rights and interests are infringed, please contact customer service in a timely manner, and we, as a neutral platform service provider, will promptly correct, delete, or handle it in accordance with the law. Comments No user comments yet Latest News More Related Recommendations

More than NPU upgrades, Microsoft teases next-generation AI PC chip lineup 2026-11-04 18:29

October DRAM prices hit new highs again Institutions: Q4 price increase trend continues 2026-11-04 18:12

DeepSeek bets on Ascend, the breakout year for domestic AI chips 2026-11-04 17:59