Yizhu Technology completes over 1 billion yuan financing, advancing 3D DRAM compute-in-memory chips
Suzhou-based AI chip company Yizhu Technology announced the completion of over 1 billion yuan in financing, with funds to be used for R&D investment, product iteration, and industrialization. The company takes 3D DRAM as its core technology route and says its all-digital general-purpose compute-in-memory AI chip has completed tape-out, with commercial chip test results basically meeting preset design targets. Its solution claims several times the performance improvement over mainstream cloud GPUs, about 1/5 the power consumption and about 1/6 the cost, with comprehensive TCO for large-model inference reduced to as low as about 1/6.
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The financing scale and the 3D DRAM compute-in-memory route appear together, allowing readers to understand another bet on storage media choice by domestic AI chip companies.
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Xin Dongxi reported on October 23 that today, Suzhou AI high-computing-power chip company Yizhu Technology announced the completion of over 1 billion yuan in financing, which will support subsequent R&D investment, product iteration, and industrialization advancement.
Yizhu Technology was founded in June 2020, officially began operations in 2022, is headquartered in Suzhou, and has subsidiaries in Shanghai, Hangzhou, Chengdu, and Changsha. The company says it uses 3D DRAM as its core technology route and pioneered a fully digital general-purpose compute-in-memory architecture; its products cover a full-stack matrix from compute cards and workstations to all-in-one machines and inference clusters, and it has launched its self-developed YICA software platform, compatible with mainstream ecosystems such as CUDA and PyTorch, providing high-throughput, cost-effective, and low-power compute solutions for scenarios such as data centers and AI cloud computing.
The company's founder, chairman, and CEO Xiong Dapeng holds a PhD in semiconductors from the University of Texas at Austin. He was formerly a teacher at Huazhong University of Science and Technology, and later served as a senior technical manager and major product line manager at ADC Telecommunications; he joined U.S. AI chip company Wave Computing as general manager of China and headed its China business, and has nearly 30 years of experience in chip R&D, products, marketing, and management in both China and the United States.
▲Yizhu Technology founder, chairman, and CEO Xiong Dapeng
On the team side, core members of Yizhu Technology's engineering team have an average of more than 25 years of experience in high-end integrated circuit design and mass production, and their R&D capabilities cover the entire integrated circuit chain, including process and devices, architecture design, circuit design, and software ecosystems.
Regarding its financing history, Yizhu Technology has completed multiple rounds of financing since its founding. In October 2024, the company announced the completion of several hundred million yuan in financing, led by overseas fund Prosperity7 Ventures, with participation from Shengshi Technology, Xingzhi Capital, and others. In October 2025, it completed a new round of financing, jointly participated in by Xingxiang Capital, Agricultural Bank of China International, Yingke Zhide, and Heding Gong Capital.
On the technology route, Yizhu Technology chose the direction of "general-purpose compute-in-memory + super-heterogeneous."
At present, Yizhu Technology's core technology route has been laid out around 3D DRAM compute-in-memory, and it has publicly proposed the three laws of general-purpose compute-in-memory. Its logic for choosing the compute-in-memory route is that under the von Neumann architecture, data is repeatedly moved between storage and computing units, bringing three major bottlenecks: the memory wall, the energy wall, and the compilation wall. Compute-in-memory places computing inside the memory array, eliminating data movement costs at the architectural level, and energy efficiency can be more than 8-10 times higher than mainstream PCIe boards.
The storage medium of the company's compute-in-memory chips has undergone iteration from ReRAM to 3D DRAM. The team ultimately chose 3D DRAM as the storage medium, whose core advantages are large capacity, mature technology, good stability, and low cost.
On product progress, according to Yizhu Technology, its fully digital general-purpose compute-in-memory AI chip based on 3D DRAM has completed tape-out and passed full-chain verification from theoretical architecture to chip hardware, and various test results of the commercial chip basically meet the preset design targets.
The company says that compared with mainstream cloud GPUs, its general-purpose compute-in-memory solution can achieve comprehensive performance of several times the performance improvement, about 1/5 the power consumption, and about 1/6 the cost, and in large-model inference scenarios the comprehensive TCO of inference compute can drop to as low as about 1/6; FPGA simulation platform data shows that compared with NVIDIA H200, the solution's throughput is increased to 2 times, power consumption is only a fraction of the latter, and cost is improved several times with throughput and power optimization.
At the software level, Yizhu Technology has formed a full-stack technology system covering its proprietary ISA instruction set, software-hardware collaborative architecture, heterogeneous fusion computing IP, CUDA-compatible compiler, operator library, and compute networking system. The solution supports features such as a 1M ultra-long context window, mixed precision and MoE sparse computing, and cluster-level KV Cache pooling, targeting long-text task scenarios such as Agents.
Conclusion: There are still differences over storage media, and compute-in-memory has only just begun
The trade-offs among different media each have their own logic: SRAM has a mature process and can directly reuse CMOS production lines, but has a large area and limited capacity; ReRAM is non-volatile and high-density, but production line maturity and resistance stability remain challenges; 3D DRAM has high bandwidth and large capacity, close to mainstream AI inference needs, but relies on advanced packaging and is not low in cost; HBF enters the storage hierarchy of large-model inference with the capacity and cost advantages of flash memory.
But the challenges of this path are equally real: the CUDA ecosystem barrier, the precision loss of analog compute-in-memory, the mass-production maturity of storage media, and the cost of advanced packaging will all affect whether the technology can ultimately complete the final leg from tape-out to volume production.