JEDEC approves SPHBM4 standard (JESD330-4)

On June 26, 2026, the international semiconductor standards organization JEDEC officially approved the SPHBM4 standard, numbered JESD330-4, with the full name Standard Package High Bandwidth Memory 4. The goal of this standard is to reduce AI chip memory costs without sacrificing performance: cutting HBM4's 2048 data signal pins to 512, while raising the per-pin transfer rate to about 44 Gbps, using 4:1 serialization to maintain total bandwidth comparable to standard HBM4, and allowing direct mounting on standard organic substrates, bypassing the silicon interposer. The standard is currently in the post-publication stage awaiting adoption; no memory manufacturer has yet launched a product, and no cloud provider has announced plans to incorporate it into its own chip designs.

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1. Jun 26· 1 reports

   JEDEC approves SPHBM4 standard

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