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Dongfang Suanxin Announces Stable Operation of 128-Card Cluster and Delivery of Large-Scale Training Clusters

1 reports1 story updatesUpdated Oct 21 17:10

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On October 21, 2026, Dongfang Suanxin announced at the Guoxin Exhibition that its 128-card DF1000 training cluster system is operating stably and that large-scale training cluster deliveries have been achieved, with plans to deliver a thousand-card-level cluster by the end of the year. According to Semiconductor Industry Vertical and Horizontal, the cluster ran continuous training for 72 hours without interruption and has carried training tasks for models including Llama2-70B and Step 130B; the hundred-billion-parameter-level Step 130B completed training adaptation in only 7 days. The report also stated that the DF1000 adopts 3D-stacked near-memory computing, with per-chip memory access bandwidth of 6.4TB/s, and that the entire chain—from chip design and 14nm wafer manufacturing to 3D hybrid bonding packaging—has been closed within the domestic industrial chain. There are currently no subsequent factual developments.

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Dongfang Suanxin's 128-card 3D chip cluster goes live, sprinting toward thousand-card delivery by year-end

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  1. Dongfang Suanxin announces stable operation of 128-GPU cluster and delivery of large-scale training clusters

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Oct 21

  1. Semiconductor Industry Observer

    Dongfang Suanxin's 128-card 3D chip cluster goes live, sprinting toward thousand-card delivery by year-end

    At the Guoxin Exhibition, Dongfang Suanxin announced that its 128-card DF1000 training cluster is running stably and that it has achieved large-scale training cluster delivery, with plans to achieve thousand-card-level cluster delivery by the end of the year. The cluster trained continuously for 72 hours without interruption and has carried training tasks for models such as Llama2-70B and Step 130B; the hundred-billion-parameter-level Step 130B completed training adaptation in only 7 days. The DF1000 adopts 3D-stacked near-memory computing, with per-chip memory access bandwidth of 6.4TB/s, and has completed a closed loop across the domestic industrial chain from chip design and 14nm wafer manufacturing to 3D hybrid bonding packaging.

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