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Micron detailed in its latest report the memory and storage chip roadmap it plans to bring to market by 2030. The report discloses that a single HBM4 memory stack reaches a bandwidth of 2.8 TB/s, and that the memory bandwidth of about 13 top-tier AI GPUs (each with 8 stacks) is enough to match the total bandwidth of the global internet, roughly 282 TB/s; NVIDIA GPU memory per card has grown from 80GB on the H100 to 288GB on the B300, a 3.6-fold increase. Micron plans by 2028 to achieve vertical HBM that stacks memory directly on top of the GPU, and to abandon the 4F2 DRAM cell layout it has researched for more than 20 years, shifting instead to 3D upward-stacked DRAM. Subsequent reports say that the vHBM Micron is developing will stack DRAM directly above the processor to shorten transmission distances and boost bandwidth, with a target of mass production in 2028 and three generations of products launched before 2030; this architecture will hinder processor heat dissipation, and analysts expect vHBM to be used in parallel with conventional HBM rather than fully replacing it. Micron's technology blueprint also includes vEIM for edge devices, with the first generation targeting a bandwidth of 2 TB per second and energy consumption below 1 picojoule per bit, also planned for mass production in 2028.
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Micron report details memory and storage chip roadmap through 2030
Source:Rohan Paul
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Oct 26
Jiwei.com
Micron's next-generation AI memory vHBM faces heat dissipation challenges: targeting mass production in 2028, bandwidth upgrades become key
Micron is developing vertical high-bandwidth memory (vHBM), which stacks DRAM directly above the processor to shorten transmission distances and increase bandwidth. It aims for mass production in 2028 and to launch three generations of products by 2030. This architecture will hinder processor heat dissipation, and analysts expect vHBM to be used alongside traditional HBM rather than fully replacing it. Micron's technology roadmap also includes vEIM for edge devices, with the first generation targeting bandwidth of 2TB per second and energy consumption below 1 picojoule per bit, also planned for mass production in 2028.
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Oct 24
Rohan Paul
Micron discloses its memory chip roadmap through 2030
In its latest report, Micron disclosed its memory and storage chip roadmap for products planned to reach the market through 2030. A single HBM4 memory stack reaches 2.8 TB/s of bandwidth; the memory bandwidth of about 13 top-tier AI GPUs (each with 8 stacks) would match the roughly 282 TB/s total bandwidth of the global internet; NVIDIA GPU memory per card rose from 80GB on the H100 to 288GB on the B300, a 3.6x increase. Micron plans to achieve vertical HBM, with memory stacked directly on top of the GPU, by 2028, and to abandon the 4F² DRAM cell layout it has researched for more than 20 years in favor of 3D upward-stacked DRAM.
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