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Friday

  1. FactRelated story

    Malaysian customs seize about $12.11 million in AI chips

    On October 15, Malaysian customs seized 30 servers equipped with high-performance AI chips at the free trade zone of Kuala Lumpur International Airport, with a cargo value of about $12.11 million; the goods had been declared as ordinary electronic components. The authorities believe the shipment originated from one Asian country and was intended for re-export to another Asian country, and suspect that an organized smuggling network is behind it, using Malaysia as a transit point to circumvent export restrictions. No arrests have been made so far, and the companies involved have been summoned to assist in the investigation. This is the fifth case the authorities have identified as linked to the network; in June, 72 AI servers were seized in the same free trade zone, and according to The Information, the total value of the related seizures is about $24 million. In 2025, Malaysia adopted the Strategic Trade Controller directive, imposing additional controls on the export, transit and transshipment of high-performance AI chips, computer systems and electronic components.

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  2. Story1 reports · 1 facts

    Faraday Technology announces securing an AI chip design win from a US customer

    In its Q3 2026 financial report, Faraday Technology announced that it has secured a cloud AI chip design win from a US customer. The project sets company records in design process node, design complexity, NRE amount, and advanced packaging: the chip is based on Samsung Foundry's 2nm process, vertically stacks a logic SoC with custom DRAM using hybrid bonding, supports FP64 computing and PCIe Gen6, and the customer had originally planned to use 4nm. In the same period, Faraday's Q3 2026 consolidated revenue was NT$3.66 billion, up 13% year-over-year and 11% quarter-over-quarter. The project is currently at the announcement stage, and no further public information on subsequent design progress is available.

    In its Q3 2026 financial report, Faraday Technology announced that it has secured a cloud AI chip design win from a US customer. The project sets company records in design process node, design complexity, NRE amount, and advanced packaging: the chip is based on Samsung Foundry's 2nm process, vertically stacks a logic SoC with custom DRAM using hybrid bonding, supports FP64 computing and PCIe Gen6, and the customer had originally planned to use 4nm. In the same period, Faraday's Q3 2026 consolida

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  3. FactRelated story

    Faraday Technology announces winning an AI chip design project from a US customer

    In its Q3 2026 financial report, Faraday Technology announced that it has secured a cloud AI chip design win from a US customer. The project sets company records in design process node, design complexity, NRE amount, and advanced packaging: the chip is based on Samsung Foundry's 2nm process, vertically stacks a logic SoC with custom DRAM using hybrid bonding, supports FP64 computing and PCIe Gen6, and the customer had originally planned to use 4nm. In the same period, Faraday's Q3 2026 consolidated revenue was NT$3.66 billion, up 13% year-over-year and 11% quarter-over-quarter. The project is currently at the announcement stage, and no further public information on subsequent design progress is available.

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  4. Story1 reports · 1 facts

    Ares CEO says avoided AI chip financing due to business complexity

    Ares Management CEO Michael Arougheti said the company is avoiding financing the high-performance processors that run high-end AI models, and is instead investing in the data centers that house those chips. He said due diligence on data center projects is simpler, the relative returns are attractive, and it is impossible to conduct due diligence to assess the value decay and depreciation curves of GPU technology. The company estimates AI capital expenditure demand at about $5 trillion, of which about $2 trillion is for physical AI computer rooms and supporting infrastructure, and $3 trillion is for purchasing GPU chips.

    Ares Management CEO Michael Arougheti said the company is avoiding financing the high-performance processors that run high-end AI models, and is instead investing in the data centers that house those chips. He said due diligence on data center projects is simpler, the relative returns are attractive, and it is impossible to conduct due diligence to assess the value decay and depreciation curves of GPU technology. The company estimates AI capital expenditure demand at about $5 trillion, of which

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  5. FactRelated story

    Ares CEO says it avoids AI chip financing due to business complexity

    Ares Management CEO Michael Arougheti said the company is avoiding financing the high-performance processors that run high-end AI models, and is instead investing in the data centers that house those chips. He said due diligence on data center projects is simpler, the relative returns are attractive, and it is impossible to conduct due diligence to assess the value decay and depreciation curves of GPU technology. The company estimates AI capital expenditure demand at about $5 trillion, of which about $2 trillion is for physical AI computer rooms and supporting infrastructure, and $3 trillion is for purchasing GPU chips.

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Tuesday

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Sunday

  1. Story1 reports · 1 facts

    Vinci executive introduces physical AI chip design method

    Vinci executive Dinesh Panneerselvam introduced Vinci's approach to bringing simulation into chip design using physical AI. According to SiliconANGLE, Vinci4D showcased its physical AI solution at SEMICON West, combining physics foundation models with GPU-native physics kernels, called Continuous Physics Reasoning, enabling engineers to obtain both accuracy and fast physical simulation at design speed. The model is trained on Vinci's own data, deployed within customers' firewalls, and can directly read existing design files. Its $250 million Series B funding will support expansion into electromagnetics, fluid dynamics, and the automotive and aerospace sectors. There are currently no subsequent development facts.

    Vinci executive Dinesh Panneerselvam introduced Vinci's approach to bringing simulation into chip design using physical AI. According to SiliconANGLE, Vinci4D showcased its physical AI solution at SEMICON West, combining physics foundation models with GPU-native physics kernels, called Continuous Physics Reasoning, enabling engineers to obtain both accuracy and fast physical simulation at design speed. The model is trained on Vinci's own data, deployed within customers' firewalls, and can direct

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Saturday

  1. FactRelated story

    Vinci executive introduces physics AI chip design approach

    Vinci executive Dinesh Panneerselvam introduced Vinci's approach to bringing simulation into chip design using physical AI. According to SiliconANGLE, Vinci4D showcased its physical AI solution at SEMICON West, combining physics foundation models with GPU-native physics kernels, called Continuous Physics Reasoning, enabling engineers to obtain both accuracy and fast physical simulation at design speed. The model is trained on Vinci's own data, deployed within customers' firewalls, and can directly read existing design files. Its $250 million Series B funding will support expansion into electromagnetics, fluid dynamics, and the automotive and aerospace sectors. There are currently no subsequent development facts.

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Friday

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Tuesday

Thursday

  1. Story1 reports · 1 facts

    T-Head releases Zhenwu V900 training-and-inference integrated AI chip

    T-Head releases the new-generation Zhenwu V900 training-and-inference integrated AI chip. According to Jiwei.com, the chip was released on September 22 at the Hangzhou Yunqi Conference; single-chip performance reaches three times that of Zhenwu M890, can meet the training and inference needs of trillion-parameter large models, and is planned for mass production and sale in the first quarter of 2027. The report says Zhenwu V900 carries 216GB of memory, chip-to-chip interconnect bandwidth of 1200GB/s, natively supports FP8 and FP4 low-precision computing, and can form a thousand-card full-bandwidth high-speed interconnect super node with the self-developed ICN Switch interconnect chip. T-Head also for the first time announced its Yitian server CPU plan, with Yitian 720 and Yitian 730 to be launched in 2027. There are currently no subsequent development facts.

    T-Head releases the new-generation Zhenwu V900 training-and-inference integrated AI chip. According to Jiwei.com, the chip was released on September 22 at the Hangzhou Yunqi Conference; single-chip performance reaches three times that of Zhenwu M890, can meet the training and inference needs of trillion-parameter large models, and is planned for mass production and sale in the first quarter of 2027. The report says Zhenwu V900 carries 216GB of memory, chip-to-chip interconnect bandwidth of 1200G

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  2. FactRelated story

    Pingtouge releases Zhenwu V900, an integrated training-and-inference AI chip

    T-Head releases the new-generation Zhenwu V900 training-and-inference integrated AI chip. According to Jiwei.com, the chip was released on September 22 at the Hangzhou Yunqi Conference; single-chip performance reaches three times that of Zhenwu M890, can meet the training and inference needs of trillion-parameter large models, and is planned for mass production and sale in the first quarter of 2027. The report says Zhenwu V900 carries 216GB of memory, chip-to-chip interconnect bandwidth of 1200GB/s, natively supports FP8 and FP4 low-precision computing, and can form a thousand-card full-bandwidth high-speed interconnect super node with the self-developed ICN Switch interconnect chip. T-Head also for the first time announced its Yitian server CPU plan, with Yitian 720 and Yitian 730 to be launched in 2027. There are currently no subsequent development facts.

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    View story:T-Head releases Zhenwu V900 training-and-inference integrated AI chip

Sunday