TSMC's CoWoS Packaging Reportedly to Raise Prices 10% to 20%, AI Packaging and Testing Capacity Remains Tight
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Affected by the explosion in AI demand and comprehensive tightness in semiconductor supply chain capacity, TSMC plans to raise CoWoS packaging quotes by 10% to 20%. This technology is widely used in high-end AI processors, and demand has extended from GPUs to server CPUs and custom ASICs, while chip equipment lead times have also lengthened from 3 to 6 months to 6 to 8 months. Analysts expect TSMC's monthly CoWoS capacity to potentially exceed 130,000 wafers in 2026 and rise to 200,000 wafers in 2027.
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From the scale of the price increase and capacity forecasts to changes in equipment lead times, this presents the degree of supply-demand tightness in the AI chip packaging segment.
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10月27日，受AI需求爆发及半导体供应链产能全面紧张影响，台积电（TSM.US）计划上调CoWoS封装报价10%至20%。
该技术广泛应用于高端AI处理器，需求已从GPU延伸至服务器CPU及定制专用集成电路。AI芯片测试周期加长加剧封测产能供给压力，芯片设备交期也从3至6个月延长至6至8个月，下游客户已无暇砍价，“只要能承诺交期便下单”。
据分析师预计，台积电2026年CoWoS月产能有望突破13万片晶圆，2027年进一步提升至20万片。台积电董事长魏哲家表示，现阶段CoWoS依旧是客户首选，台积电是目前唯一实现五倍光罩规模量产的厂商。目前其五倍光罩尺寸封装已量产且良率优异，并持续开发九倍、十四倍光罩尺寸方案及推进CoPoS技术。
此外，今年台积电年度设备采购未重新议价，直接按原有价格下单，侧面表明当前市场需求强劲。
（文章来源：财闻） 正文中部 内嵌广告