AI 基础设施网络从铜互连转向光互连：Cisco 与 Nvidia 推进 USFP 光模块

UPDATED 07:14 EDT / OCTOBER 14 2026

Copper’s days are numbered inside AI racks as Cisco bets on optics

by Jonathan Anthony

AI infrastructure networking is approaching a physical turning point as the copper links that tie GPUs together inside a rack strain under ever-faster signaling speeds. The move to light-based interconnects could redraw the boundaries of what counts as a single AI system.

Cisco Systems Inc. is pressing that transition on several fronts, from new silicon and pluggable optics to an optical standard being developed with Nvidia Corp. The industry now sits at the pivot point between electrical and optical interconnects, according to Rakesh Chopra (pictured), senior vice president of silicon and systems architecture and Cisco fellow at Cisco.

“Right now, in-rack copper, in-system copper … is not a durable place to stand,” Chopra said. “It will switch to optical. My guess is what you’ll see is in a handful of years, that’ll be the norm, and that allows you to take your scale-up domain from a single rack to row-scale or beyond.”

Chopra spoke with theCUBE Research’s John Furrier at the AI Data Pipeline Forum, during an exclusive broadcast on theCUBE, SiliconANGLE Media’s livestreaming studio. They discussed AI infrastructure networking, the limits of copper interconnects and the shift to denser optical modules. (* Disclosure below.)

Why AI infrastructure networking needs a new playbook

The near-term step is denser pluggable optics. Cisco and Nvidia announced plans for USFP, short for Ultra-Dense Small Form Factor Pluggable, an optical module designed to support 400 gigabits per lane. Today’s optical form factors top out at 200 gigabits per lane, Chopra noted.

“Our goal with that is to drive an open ecosystem enabling people to deploy high bandwidth, highly efficient optics into their infrastructure,” Chopra said. “So it’s about four times denser than today’s OSFP 1.6T and about 1.3 times more power-efficient.”

That optics work rests on Cisco Silicon One, the chip architecture the company announced in December 2019. Rather than designing dedicated silicon for each market segment, which locks companies into siloed technical debt, Cisco built one scalable architecture whose devices now span about 100 gigabits to 100 terabits, Chopra explained.

“This notion that locality defines the function is actually a fundamentally flawed premise. It’s the premise of yesterday and not the premise of tomorrow,” he said. “What really matters is that you can secure and deploy it in different sizes anywhere you need to.”

Here’s the complete video interview, part of SiliconANGLE’s and theCUBE’s coverage of the AI Data Pipeline Forum:

(* Disclosure: ScaleFlux sponsored this segment of theCUBE. Neither ScaleFlux nor other sponsors have editorial control over content on theCUBE or SiliconANGLE.)

Photo: SiliconANGLE

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AI 基础设施网络从铜互连转向光互连：Cisco 与 Nvidia 推进 USFP 光模块

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