Understand this story
Intel Chief Technology Officer Pushkar Ranade said on the Dwarkesh podcast that even with ample funding, global leading-edge wafer output would be hard to expand tenfold, and a more realistic upper limit is about twofold, with the constraint coming from the ability of the entire semiconductor supply chain to expand capacity in coordination. He noted that ASML produces fewer than 100 EUV lithography machines per year and will find it hard to expand output substantially by the end of this decade; equipment ordered today is typically delivered only about 18 months later, and capacity would come online around 2028 or later. He also said AI compute capacity has grown roughly threefold per year over the past decade, while equipment, cleanrooms and fab scale are becoming the new capacity ceiling. This claim currently comes from a single report, with no subsequent factual developments.
AI-generated from public reports
Developments
1 confirmed developments
Intel CTO says growth cap for leading-edge wafer output is about twofold
Source:IT Home · AI
Reports and discussion timeline
Browse reports and discussion by time. Their evidence levels remain distinct.
Oct 23
Wallstreetcn
Inside Intel's Fabs: Chips Head Toward 3D Stacking by 2045, Mass Production of New Structures to Take About a Decade
Dwarkesh Patel visited Intel's fabs and research labs for two days, discussing gate-all-around, backside power delivery, CFET and advanced packaging with five technical leaders, concluding that by 2045 chips will continue to develop toward 3D stacking, but each new structure will take about a decade to work through heat dissipation and integration challenges, and engineers have about four years of visibility into the technology roadmap. Intel CTO Pushkar Ranade estimates that existing global equipment is roughly only enough to double advanced-process wafer output, while AI compute has grown 3x per year for a decade; equipment orders take 18 months to receive, and new fabs will basically not come online until the end of this decade.
IT Home · Artificial Intelligence
Intel CTO Says Leading-Edge Wafer Output Can at Most Double, AI Compute Expansion Hits Supply Chain Ceiling
Intel CTO Pushkar Ranade said on the Dwarkesh podcast that even with ample funding, global cutting-edge wafer output would be hard-pressed to expand tenfold; a more realistic ceiling is roughly twofold, with the limit stemming from the entire semiconductor supply chain's ability to expand capacity in coordination. He noted that ASML produces fewer than 100 EUV lithography machines per year and will struggle to significantly ramp up production by the end of this decade; equipment ordered today typically takes about 18 months to be delivered, and capacity will only come online around 2028. He also mentioned that AI compute capacity has grown roughly threefold per year over the past decade, while equipment, cleanrooms and fab scale are becoming the new capacity ceiling.
Electronic Technology Application
Intel CTO says leading-edge wafer output can expand at most to two times, constrained by the semiconductor supply chain
Intel CTO Pushkar Ranade said on the Dwarkesh podcast that even with ample funding, global leading-edge wafer output would be hard to expand tenfold, and a more realistic upper limit is about two times. He noted the constraint comes from the entire semiconductor supply chain's ability to expand capacity in coordination, that ASML produces fewer than 100 EUV lithography machines per year and will struggle to expand output significantly by the end of this decade, and that Intel, TSMC, SK Hynix and other manufacturers all compete for these machines. He added that equipment ordered today is typically delivered about 18 months later, and capacity would only come online around 2028.